Flow

Market position

Flow Computing positions itself as an entrant in the CPU architecture and semiconductor IP space, offering an alternative to GPU offloading for general-purpose parallel workloads. Third-party recognition cited includes being named one of Finland's "10 Most Interesting Startups" of 2025 by Talouselämä, winning KPMG Tech Innovator in Finland 2025, reaching the KPMG Global Tech Innovator 2025 finalist stage, and coverage in IEEE Spectrum.

Compared with SMP/NUMA multicore CPUs and GPUs, the company cites the absence of cache-coherence overhead, synchronization costs orders of magnitude lower than CPUs (hundreds to thousands of cycles) and GPUs (thousands to hundreds of thousands of cycles), zero-cost context switching, tolerance of non-local memory access patterns without manual partitioning, instruction-set independence across Arm, x86, RISC-V and Open Power, and full backward compatibility with existing code after recompilation. The company also positions the PPU as complementary, arguing that attached vector units, matrix units, NPUs and GPUs benefit indirectly from a faster CPU.

Technology

The Flow PPU is an on-chip IP block or chiplet coupled to a multicore CPU, based on Emulated Shared Memory (ESM) architecture and the Thick Control Flow (TCF) execution model. Design principles described by the company include no cache coherence in the PPU memory system, near cost-free synchronization, hardware primitives for concurrent reads/writes, reductions, multi-prefix and compute-update operations and fiber mapping, an unbounded fiber count at the model level with programmable mapping of fibers to backend units, zero-cost fiber (context) switching, chaining of functional units so dependent operations execute in parallel within a step, congestion avoidance via hashing in the interconnection network, scalable latency tolerance, insensitivity to memory data partitioning schemes, and an interconnection network sized for random communication. The architecture is patented per the company and is paired with a compiler that can assign parallel code sections to the PPU; the compiler reached alpha stage in 2025.

Go-to-market

The company engages the semiconductor ecosystem directly, with founders meeting semiconductor companies, AI infrastructure leaders, partners and investors around industry events such as HOT CHIPS 2025 in Silicon Valley. It publishes benchmark results, technical explainers and scientific references on its site, and participates in accelerator and awards programs including Business Finland's Deep Tech Accelerator.

Semiconductor companies and CPU designers, plus AI infrastructure players, addressed across server/cloud and data-center and HPC markets, industrial and embedded systems (robotics, autonomous platforms, defense, real-time industrial compute), and consumer/edge devices such as smartphones, laptops and smartwatches.

Geography

Headquartered in Finland, with research roots at the University of Joensuu and VTT Technical Research Centre of Finland; business development activity includes founder visits to Silicon Valley around HOT CHIPS 2025.

History

Flow Computing's technology base draws on more than three decades of academic and applied research. Publicly noted milestones include IEEE Spectrum coverage of its CPU speedup claim in 2024, selection by Talouselämä as one of Finland's most interesting startups in March 2025, a May 2025 milestone in which the PPU executed end-to-end CPU operations in alpha testing with the compiler in alpha, winning the KPMG Tech Innovator in Finland competition in July 2025, attendance at HOT CHIPS 2025 in August 2025, and selection for Business Finland's Deep Tech Accelerator announced in February 2026.

Risks & controversies

The technology is pre-commercial: as of the May 2025 alpha milestone the PPU and compiler were at alpha stage with commercialization still ahead, and realized gains depend on recompilation and on the amount of parallel functionality in customer software. Adoption requires integration into third-party CPU silicon or packages, making the company dependent on semiconductor partners.