Agile Analog

Agile Analog Ltd is a semiconductor IP company headquartered in Cambridge, UK, that supplies configurable, process node agnostic analog IP blocks and subsystems for ASIC and SoC designs. Its portfolio spans five product families: data conversion (8/10-bit and 12-bit ADCs and DACs, sensor interface subsystem), power management (low drop-out regulators, power-on-reset circuits, power-OK monitors, bandgap references, power management subsystem), IC monitoring (IR drop sensor, programmable-threshold comparator, analog- and digital-output temperature sensors, PVT sensor subsystem), security (voltage glitch detector, clock attack monitor, temperature glitch detector, EMFI detector, marketed as the agileSecure suite) and always-on IP (digital standard cell library, RC oscillator, low-power regulator, comparator and bandgap, sleep management subsystem).

The company's core technology is Composa, a configurable multi-process platform that automatically generates analog IP to a customer's functional specifications and optimization choices for a chosen foundry and process node, using design automation, design simulation and artificial intelligence. The IP is digitally wrapped and verified for integration into SoCs, and is described as compatible with the process development kits of major foundries and with almost all analog CMOS processes, including advanced FinFET processes. Stated target applications include high-performance computing and data center, IoT and IoT security, AI, automotive, defense/aerospace and RISC-V designs.

Founding story

Agile Analog was created by a team of analog engineers, chip designers and semiconductor IP industry executives who set out to automate analog circuit design, a problem the company says had eluded the industry for decades.

Business model

Agile Analog licenses analog IP blocks and subsystems to chip developers, generating each IP instance for the customer's stated specifications, foundry and process node rather than selling fixed off-the-shelf blocks. Sales are handled by regional specification engineers, with customers contacting the company to define the IP for a given design.

Revenue is derived from supplying customer-configured analog IP blocks and subsystems generated by the Composa platform for specific chip designs and foundry processes.

Traction

At the 2021 funding round the company stated its technology and process were proven with customers ranging from OEMs to Tier 1 semiconductor companies, and it planned to double headcount to over 100 people within 12 months. The company reports a growing customer base across the globe and continues to advertise open engineering and IT roles.

Latest developments

Recent announcements include a collaboration with Xiphera (June 2026), an agileSecure US deal (September 2025) and a new anti-tamper solution (March 2025), alongside media coverage on analog tamper detection sensors, analog IP in the post-quantum cryptography era and an interview about Pavona, plus participation in the GlobalFoundries Technology Summit 2026 North America.